IPQ8064 introduction

 

The IPQ8064 is an internet processor for carrier gateway and smart retail router. The IPQ8064 includes a powerful dual-core SMP Krait CPU at 1.4 GHz with an ARM-v7-compliant instruction set. Each Krait CPU includes a 128-bit SIMD DSP, referred to as VeNum. The CPU system is supported by 1 MByte of L2 cache as well as 16 KiB L1 I-Cache and 16 KiB L1 D-Cache.

The IPQ8064 also includes a network accelerator with an aggregate throughput capacity of 5 Gbps. This network accelerator is referred to as the Networking Subsystem (NSS). The NSS consists of two programmable, multithreaded, network accelerator engines. Each network accelerator engine supports 12 threads of execution. The function of each thread is determined by firmware (FW) provided by Qualcomm Atheros. The NSS architecture allows the threads to operate in parallel. NSS functions include L2/L3 routing/bridging, Samba acceleration, LRO/TSO offload, connectivity acceleration, as well as traffic management.

The IPQ8064 typically runs an OpenWRT Linux IP stack on the Dual Core SMP Krait, while the NSS accelerates networking traffic (fast path). The NSS operates under full control of the Linux stack. Rules in the NSS are set by the Linux stack. Networking packets that do not match these rules are passed on to the Linux stack through an exception handling mechanism in the NSS.

To support a large variety of platforms, the IPQ8064 is equipped with several high speed Serdes and general purpose interfaces. These include:

 

4×GMACs, configurable as:

1×QSGMII

3×SGMII and 1×RGMII

2×SGMII and 2×RGMII

3×PCIe 2.0 (root complex)  2×USB3 (host and device mode)

SATA3  32-bit DDR3/1066

8-bit NAND/SDIO

ECC 8b/512, 16b/1024

4-bit SDIO  HSIC

2×Transport Stream Interface (TSIF)

6×general-purpose serial interfaces (GSBI), configurable as SPI, UART, I 2 C, UIM.

JTAG

 

BHX8064.jpeg

 

IPQ8064 System Block Diagram.jpg

IPQ8064 functional block diagram

 

Complementary blocks within the IPQ8064 include:

 TrustZone, supplemented with additional trusted-computing logic at each bus interface

 Resource power manager

 MPEG-TS Packet Processor

 On-chip memory (OCM)

 NSS network accelerator

 Security acceleration for AES, 3DES, SHA

bitswrt  802.11AC  Wave 2  11AX  OEM  ODM  JDM

MU-MIMO AP CPE   QSDK openwrt

CONTACT/ 联系我们

@2014-2018 bitswrt Communication Technology Co., Ltd.   湘ICP备15013406号